AD9216(RevA) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

AD9216
(Rev.:RevA)

10-Bit, 65/80/105 MSPS Dual A/D Converter

Analog Devices 

AD9216

Pin No.

46 to 51,

54 to 57

59

60

61

62

63

Mnemonic

D0_A (LSB) to

D9_A (MSB)

OEB_A

PDWN_A

MUX_SELECT

SHARED_REF

CLK_A

Description

Channel A Data Output Bits.

Output Enable for Channel A.

Logic 0 enables Data Bus A.

Logic 1 sets outputs to High-Z.

Power-Down Function Selection for Channel A.

Logic 0 enables Channel A.

Logic 1 powers down Channel A. (Outputs static, not High-Z.)

Data Multiplexed Mode. (See Data Format section for how to enable.)

Shared Reference Control Bit. Low for independent reference mode; high for shared reference mode.

Clock Input Pin for Channel A.

1 It is recommended that all ground pins (AGND and DRGND) be tied to a common ground plane.

Rev. A | Page 10 of 40

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