TD9944TG-G(2009) Ver la hoja de datos (PDF) - Supertex Inc
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TD9944TG-G Datasheet PDF : 5 Pages
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TD9944
Dual N-Channel Enhancement-Mode
Vertical DMOS FET
Features
► Dual N-channel devices
► Low threshold – 2.0V max.
► High input impedance
► Low input capacitance – 125pF max.
► Fast switching speeds
► Low on-resistance
► Free from secondary breakdown
► Low input and output leakage
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Applications
► Logic level interfaces – ideal for TTL and CMOS
► Solid state relays
► Battery operated systems
► Photo voltaic drives
► Analog switches
► General purpose line drivers
► Telecom switches
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Package Option
Device
8-Lead SOIC
4.90x3.90mm body
1.75mm height (max)
1.27mm pitch
TD9944
TD9944TG-G
-G indicates package is RoHS compliant (‘Green’)
BVDSS/BVDGS
(V)
240
RDS(ON)
(max)
(Ω)
6.0
ID(ON)
(min)
(A)
1.0
VGS(th)
(max)
(V)
2.0
Pin Configuration
D2
D2
D1
D1
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature*
300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
G2
S2
G1
S1
8-Lead SOIC (TG)
Product Marking
TD99
44TG
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
8-Lead SOIC (TG)
* Distance of 1.6mm from case for 10 seconds.
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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