AD7992BRMZ-1 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD7992BRMZ-1 Datasheet PDF : 28 Pages
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AD7992
Parameter
t10
t11
t11A
t12
tSP
tPOWER-UP
Conditions
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Standard mode
Fast mode
High speed mode
CB = 100 pF max
CB = 400 pF max
Fast mode
High speed mode
Limit at TMIN, TMAX
Min
Max
300
20 + 0.1 CB 300
Unit
ns
ns
Description
tFDA, fall time of SDA signal
10
20
20 + 0.1 CB
80
160
1000
300
ns
ns
ns
tRCL, rise time of SCL signal
ns
10
20
20 + 0.1 CB
40
80
1000
300
ns
ns
ns
tRCL1, rise time of SCL signal after a repeated START
condition and after an acknowledge bit
ns
10
80
20
160
300
20 + 0.1 CB 300
ns
ns
ns
tFCL, fall time of SCL signal
ns
10
40
ns
20
80
ns
0
50
ns
Pulse width of suppressed spike
0
10
ns
1
µs typ Power-up time
1 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
2 For 3 V supplies, the maximum hold time with CB = 100 pF max is 100 ns max.
SCL
t11
t2
t6
t4
SDA
t7
P
S
S = START CONDITION
P = STOP CONDITION
t12
t3
t1
t6
t5
t10
S
Figure 2. Two-Wire Serial Interface Timing Diagram
t8
t9
P
Rev. 0 | Page 6 of 28
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