AD7888 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD7888 Datasheet PDF : 18 Pages
| |||
AD7888–SPECIFICATIONS (VDD = 2.7 V to 5.25 V, REFIN/REFOUT = 2.5 V External/Internal Reference unless
otherwise noted; fSCLK = 2 MHz (VDD = 2.7 V to 5.25 V); TA = TMIN to TMAX, unless otherwise noted.)
Parameter
A Version1 B Version1
Unit
Test Condition/Comment
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio2, 3 (SNR) 71
71
Total Harmonic Distortion2 (THD)
–80
–80
Peak Harmonic or Spurious Noise2
–80
–80
Intermodulation Distortion2 (IMD)
Second Order Terms
–78
–78
Third Order Terms
–78
–78
Channel-to-Channel Isolation2
–80
–80
Full Power Bandwidth
2.5
2.5
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
MHz typ
fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS
fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS
fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS
fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS
fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS
fIN = 25 kHz
@ 3 dB
DC ACCURACY
Resolution
Integral Nonlinearity2
Differential Nonlinearity2
Offset Error
Offset Error Match2
Gain Error2
Gain Error Match2
12
12
±2
±1
±2
–1/+1.5
±6
±6
± 4.5
± 4.5
2
2
±2
±2
3
3
Bits
LSB max
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB max
Any Channel
Guaranteed No Missed Codes to 11 Bits (A Grade)
Guaranteed No Missed Codes to 12 Bits (B Grade)
VDD = 4.75 V to 5.25 V (Typically ± 3 LSB)
VDD = 2.7 V to 3.6 V (Typically ± 2 LSB)
Typically 30 LSB with Internal Reference
ANALOG INPUT
Input Voltage Ranges
Leakage Current
Input Capacitance
0 to VREF
±1
38
4
0 to VREF
±1
38
4
Volts
µA max
pF typ
pF typ
When in Track
When in Hold
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
Input Impedance
REFOUT Output Voltage
REFOUT Tempco
2.5/VDD
5
2.45/2.55
± 50
2.5/VDD
5
2.45/2.55
± 50
V min/max
kΩ typ
V min/max
ppm/°C typ
Functional from 1.2 V
Very High Impedance If Internal Reference Disabled
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN4
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance5
Output Coding
2.4
2.4
2.1
2.1
0.8
0.8
± 10
± 10
10
10
V min
V min
V max
µA max
pF max
VDD – 0.5
0.4
VDD – 0.5
0.4
± 10
± 10
10
10
Straight (Natural) Binary
V min
V max
µA max
pF max
VDD = 4.75 V to 5.25 V
VDD = 2.7 V to 3.6 V
VDD = 2.7 V to 5.25 V
Typically 10 nA, VIN = 0 V or VDD
ISOURCE = 200 µA
VDD = 2.7 V to 5.25 V
ISINK = 200 µA
CONVERSION RATE
Throughput Time
Track/Hold Acquisition Time2
Conversion Time
16
16
1.5
1.5
14.5
14.5
SCLK Cycles
SCLK Cycles
SCLK Cycles
Conversion Time + Acquisition Time. 125 kSPS with
2 MHz Clock
7.25 µs (2 MHz Clock)
–2–
REV. C
Share Link: 