AD7875 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
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Fabricante
AD7875 Datasheet PDF : 20 Pages
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AD7870/AD7875/AD7876–SPECIFICATIONS (VDD = +5 V ؎ 5%, VSS = –5 V ؎ 5%,
A6ND = DGND = 0 V, fCLK = 2.5 MHz external, unless otherwise stated. All Specifications Tmin to Tmax unless otherwise noted.)
Parameter
AD7870
J, Al K, Bl L, Cl Sl
Tl
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE2
Signal to Noise Ratio3 (SNR)
@ +25°C
TMIN to TMAX
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Second Order Terms
Third Order Terms
Track/Hold Acquisition Time
70 70
70 70
–80 –80
–80 –80
72 69 69
71 69 69
–80 –78 –78
–80 –78 –78
dB min
dB min
dB max
dB max
–80 –80
–80 –80
2
2
–80 –78 –78
–80 –78 –78
22
2
dB max
dB max
µs max
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
Typically 71.5 dB for 0 < VIN < 50 kHz
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
Typically –86 dB for 0 < VIN < 50 kHz
VIN = 10 kHz, fSAMPLE = 100 kHz
Typically –86 dB for 0 < VIN < 50 kHz
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
DC ACCURACY
Resolution
Minimum Resolution for which
No Missing Codes are Guaranteed
Integral Nonlinearity
Integral Nonlinearity
Differential Nonlinearity
Bipolar Zero Error
Positive Full-Scale Error4
Negative Full-Scale Error4
12 12
12 12 12
Bits
12 12
± 1/2 ± 1/2
±1
±1
±5 ±5
±5 ±5
±5 ±5
12 12 12
± 1/4 ± 1/2 ± 1/2
± 1/2
±1
±1
±1
±5 ±5 ±5
±5 ±5 ±5
±5 ±5 ±5
Bits
LSB typ
LSB max
LSB max
LSB max
LSB max
LSB max
ANALOG INPUT
Input Voltage Range
Input Current
±3 ±3
±3 ±3 ±3
Volts
± 500 ± 500 ± 500 ± 500 ± 500 µA max
REFERENCE OUTPUT
REF OUT @ +25°C
2.99 2.99
3.01 3.01
REF OUT Tempco
± 60 ± 60
Reference Load Sensitivity (∆REF OUT/∆I) ± 1 ± 1
2.99 2.99 2.99
3.01 3.01 3.01
± 35 ± 60 ± 35
±1 ±1 ±1
V min
V max
ppm/°C max
mV max
Reference Load Current Change (0–500 µA)
Reference Load Should Not Be Changed
During Conversion.
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Current (12/8/CLK Input Only)
Input Capacitance, CIN5
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
DB11–DB0
Floating-State Leakage Current
Floating-State Output Capacitance5
2.4 2.4
0.8 0.8
± 10 ± 10
± 10 ± 10
10 10
2.4 2.4 2.4
0.8 0.8 0.8
± 10 ± 10 ± 10
± 10 ± 10 ± 10
10 10 10
V min
V max
µA max
µA max
pF max
4.0 4.0
0.4 0.4
± 10 ± 10
15 15
4.0 4.0 4.0
0.4 0.4 0.4
± 10 ± 10 ± 10
15 15 15
V min
V max
µA max
pF max
VDD = 5 V ± 5%
VDD = 5 V ± 5%
VIN = 0 V to VDD
VIN = VSS to VDD
ISOURCE = 40 µA
ISINK = 1.6 mA
CONVERSION TIME
External Clock (fCLK = 2.5 MHz)
Internal Clock
8
8
7/9 7/9
88
8
7/9 7/9 7/9
µs max
µs min/µs max
POWER REQUIREMENTS
VDD
VSS
IDD
ISS
Power Dissipation
+5 +5
–5 –5
13 13
6
6
95 95
+5 +5 +5
–5 –5 –5
13 13 13
66
6
95 95 95
V nom
V nom
mA max
mA max
mW max
± 5% for Specified Performance
± 5% for Specified Performance
Typically 8 mA
Typically 4 mA
Typically 60 mW
NOTES
1Temperature ranges are as follows: J, K, L Versions; 0°C to +70°C: A, B, C Versions; –25°C to +85°C: S, T Versions; –55°C to +125°C.
2VIN (pk-pk) = ± 3 V.
3SNR calculation includes distortion and noise components.
4Measured with respect to internal reference and includes bipolar offset error.
5Sample tested @ +25°C to ensure compliance.
Specifications subject to change without notice.
–2–
REV. B
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