EVAL-CED1Z(Rev0) Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción

Fabricante

EVAL-CED1Z
(Rev.:Rev0)

1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators

Analog Devices 

AD7262

Parameter

Min

POWER REQUIREMENTS

AVCC

4.75

CA_CBVCC, CC_CDVCC

2.7

VDRIVE

2.7

IDD

ADC Normal Mode (Static)

ADC Normal Mode (Dynamic)

Shutdown Mode

Power Dissipation

ADC Normal Mode (Static)

ADC Normal Mode (Dynamic)

Shutdown Mode

Typ

Max

5.25

5.25

5.25

20

31.5

23

33.3

0.5

1

105

165

120

175

2.625 5.25

Unit Test Conditions/Comments

Digital inputs = 0 V or VDRIVE

V

V

V

mA

AVCC = 5.25 V

mA

AVCC = 5.25 V

μA

AVCC = 5.25 V, ADCs and comparators

powered down

mW

mW

μW

1 These specifications were determined without the use of the gain calibration feature.

2 See the Terminology section.

3 Samples tested during initial release to ensure compliance; they are not subject to production testing.

4 For PGA gain = 1; to use the full analog input range (VCM ± VREF/2) of the AD7262, the VCM voltage should be dropped to lie within a range from 1.95 V to 2.05 V.

5 Refers to Pin VREFA or Pin VREFB.

6 This specification includes the IDD for both comparators. The IDD per comparator is the specified value divided by two.

Rev. 0 | Page 5 of 32

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