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AD7171BCPZ-500RL7(Rev0) Ver la hoja de datos (PDF) - Analog Devices

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componentes Descripción
Fabricante
AD7171BCPZ-500RL7
(Rev.:Rev0)
ADI
Analog Devices ADI
AD7171BCPZ-500RL7 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7171
SPECIFICATIONS
VDD = 2.7 V to 5.25 V, VREF = VDD, GND = 0 V, all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
ADC CHANNEL
Output Data Rate (fADC)
No Missing Codes2
Resolution Peak-to-Peak (p-p)
Effective Resolution (ENOB)
RMS Noise
Integral Nonlinearity
Offset Error
Offset Error Drift vs. Temperature
Full-Scale Error
Gain Drift vs. Temperature
Power Supply Rejection
ANALOG INPUTS
Differential Input Voltage Range
Absolute AINx Voltage Limits2
Average Input Current2
Average Input Current Drift
DC Common-Mode Rejection
REFERENCE
External REFIN Voltage
Reference Voltage Range2
Absolute REFIN Voltage Limits2
Average Reference Input Current
Average Reference Input Current
Drift
DC Common-Mode Rejection
INTERNAL CLOCK
Frequency2
LOGIC INPUTS
SCLK, PDRST2
Input Low Voltage, VINL
Input High Voltage, VINH
SCLK (Schmitt-Triggered Input)2
Hysteresis
Input Currents
Input Capacitance
Min
16
GND − 0.03
0.5
GND − 0.03
64 − 5%
AD7171B 1
Typ
Max
125
16
16
See Table 6
±0.4
±200
±250
±0.015
±0.07
85
±VREF
±400
±60
90
VDD + 0.03
VDD
400
±0.15
110
VDD
VDD + 0.03
64 + 5%
0.4
0.8
1.8
2.4
100
140
±2
5
Unit
Hz
Bits
Bits
Bits
μV
LSB
μV
nV/°C
% of FS
LSB/°C
dB
V
V
nA/V
pA/V/°C
dB
V
V
V
nA/V
nA/V/°C
dB
kHz
Test Conditions/Comments
Settling time = 3/fADC
VINx = 0 V, VREF = VDD
VINx = 0 V, VREF = VDD
VINx = 0 V, VREF = VDD
VINx = 1 V
VREF = REFIN(+) − REFIN(−)
Input current varies with input
voltage
VINx = 1 V
REFIN = REFIN(+) − REFIN(−)
V
VDD = 3 V
V
VDD = 5 V
V
VDD = 3 V
V
VDD = 5 V
mV
VDD = 3 V
mV
VDD = 5 V
μA
VIN = VDD or GND
pF
All digital inputs
Rev. 0 | Page 3 of 16

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