AD708JNZ Ver la hoja de datos (PDF) - Analog Devices
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AD708JNZ Datasheet PDF : 16 Pages
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AD708
THEORY OF OPERATION
CROSSTALK PERFORMANCE
The AD708 exhibits very low crosstalk as shown in Figure 25,
Figure 26, and Figure 27. Figure 25 shows the offset voltage
induced on Side B of the AD708 when Side A output is moving
slowly (0.2 Hz) from −10 V to +10 V under no load. This is the
least stressful situation to the part because the overall power in
the chip does not change. Only the location of the power in the
output device changes. Figure 26 shows the input offset voltage
change to Side B when Side A is driving a 2 kΩ load. Here the
power changes in the chip with the maximum power change
occurring at 7.5 V. Figure 27 shows crosstalk under the most
severe conditions. Side A is connected as a follower with
0 V input, and is forced to sink and source ±5 mA of output
current.
Power = (30 V)(5 mA) = 150 mW
Even this large change in power causes only an 8 μV (linear)
change in the input offset voltage of Side B.
VIN = ±10V
A
10kΩ
B
10Ω
10Ω
VOUTA
VOUTB
2V
VOUTA = 2V/DIV
Figure 25. Crosstalk with No Load
VIN = ±10V
A
10kΩ
VOUTA
2kΩ
B
10Ω
10Ω
VOUTB
2V
VOUTA = 2V/DIV
Figure 26. Crosstalk with 2 kΩ Load
IIN = ±5mA
A
2kΩ
VIN = ±10V
10kΩ
B
10Ω
10Ω
VOUTB
2V
INA = 1mA/DIV
Figure 27. Crosstalk Under Forced Source and Sink Conditions
Rev. C | Page 10 of 16
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