XWM8728EDS(2001) Ver la hoja de datos (PDF) - Wolfson Microelectronics plc
Número de pieza
componentes Descripción
Fabricante
XWM8728EDS
(Rev.:2001)
(Rev.:2001)
Wolfson Microelectronics plc
XWM8728EDS Datasheet PDF : 28 Pages
| |||
WM8728
MASTER CLOCK TIMING
MCLK
tMCLKL
tMCLKH
tMCLKY
Figure 1 Master Clock Timing Requirements
Product Preview
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Master Clock Timing Information
MCLK Master clock pulse width high
MCLK Master clock pulse width low
MCLK Master clock cycle time
tMCLKH
tMCLKL
tMCLKY
MCLK Duty cycle
TEST CONDITIONS
MIN
13
13
26
40:60
TYP
MAX
60:40
DIGITAL AUDIO INTERFACE
tBCH
tBCL
BCKIN
tBCY
UNIT
ns
ns
ns
LRCIN
DIN
tDS
tLRH
tLRSU
tDH
Figure 2 Digital Audio Data Timing
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
BCKIN cycle time
BCKIN pulse width high
BCKIN pulse width low
LRCIN set-up time to
BCKIN rising edge
tBCY
tBCH
tBCL
tLRSU
LRCIN hold time from
tLRH
BCKIN rising edge
DIN set-up time to BCKIN
tDS
rising edge
DIN hold time from BCKIN
tDH
rising edge
TEST CONDITIONS
MIN
TYP
MAX
40
16
16
8
8
8
8
UNIT
ns
ns
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
6
Share Link: