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AD652JP(RevB) Ver la hoja de datos (PDF) - Analog Devices

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AD652JP Datasheet PDF : 16 Pages
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AD652–SPECIFICATIONS (typical @ TA = +25؇C, VS = ؎15 V, unless otherwise noted)
Parameter
AD652JP/AQ/SQ
Min
Typ
Max
AD652KP/BQ
Min
Typ
Max
Units
VOLTAGE-TO-FREQUENCY MODE
Gain Error
fCLOCK = 200 kHz
fCLOCK = 1 MHz
fCLOCK = 4 MHz
Gain Temperature Coefficient
fCLOCK = 200 kHz
fCLOCK = 1 MHz
fCLOCK = 4 MHz
Power Supply Rejection Ratio
Linearity Error
fCLOCK = 200 kHz
fCLOCK = 1 MHz
fCLOCK = 2 MHz
fCLOCK = 4 MHz
Offset (Transfer Function, RTI)
Offset Temperature Coefficient
Response Time
± 0.5
±1
± 0.5
؎1
± 0.5
؎1.5
± 0.25 ± 0.5
%
± 0.25 ؎0.5
%
± 0.25 ؎0.75 %
± 25
± 50
± 25
؎50
± 10
؎50
± 25
؎75
0.001 0.01
± 15
± 25
± 15
؎25
± 10
؎30
± 15
؎50
0.001 0.01
ppm/°C
ppm/°C
ppm/°C1
ppm/°C
%/V
± 0.002 ± 0.02
± 0.002 ± 0.005
± 0.002 ؎0.02
± 0.002 ؎0.005
± 0.01 ± 0.02
± 0.002 ± 0.005
± 0.02 ؎0.05
± 0.01 ؎0.02
±1
؎3
±1
؎2
± 10
؎50
± 10
؎25
One Period of New Output Frequency Plus One Clock Period.
%
%
%
%
mV
µV/°C
FREQUENCY-TO-VOLTAGE MODE
Gain Error
fIN = 100 kHz FS
Linearity Error
fIN = 100 kHz FS
INPUT RESISTORS
Cerdip (Figure 1a)(0 to +10 V FS Range)
PLCC (Figure lb)
Pin 8 to Pin 7
Pin 7 to Pin 5 (0 V to +5 V FS Range)
Pin 8 to Pin 5 (0 V to +10 V FS Range)
Pin 9 to Pin 5 (0 V to +8 V FS Range)
Pin 10 to Pin 5 (Auxiliary Input)
Temperature Coefficient (All)
INTEGRATOR OP AMP
Input Bias Current
Inverting Input (Pin 5)
Noninverting Input (Pin 6)
Input Offset Current
Input Offset Current Drift
Input Offset Voltage
Input Offset Voltage Drift
Open Loop Gain
Common-Mode Input Range
CMRR
Bandwidth
Output Voltage Range
(Referred to Pin 6, R1 > = 5k)
19.8
9.9
9.9
19.8
15.8
19.8
–VS + 5
80
14
–1
± 0.5
± 0.002
20
10
10
20
16
20
± 50
±5
20
20
1
±1
± 10
86
95
±1
± 0.02
20.2
10.1
10.1
20.2
16.2
20.2
؎100
؎20
50
70
3
؎3
± 25
+VS – 5
(+VS – 4)
± 0.25 ± 0.5
%
± 0.002 ± 0.01 %
19.8
20
20.2
k
9.9
10
10.1
k
9.9
10
10.1
k
19.8
20
20.2
k
15.8
16
16.2
k
19.8
20
20.2
k
± 50
؎100 ppm/°C
±5
20
20
1
±1
± 10
86
–VS + 5
80
14
95
–1
؎20
nA
50
nA
70
nA
2
nA/°C
؎2
mV
± 15
µV/°C
dB
+VS – 5 V
dB
MHz
(+VS – 4) V
COMPARATOR
Input Bias Current
Common-Mode Voltage
CLOCK INPUT
Maximum Frequency
Threshold Voltage (Referred to Pin 12)
TMIN to TMAX
Input Current
(–VS<VCLK< +VS)
Voltage Range
Rise Time
0.5
–VS + 4
4
5
1.2
0.8
5
–VS
5
+ VS – 4
2.0
20
+VS
2
0.5
–VS + 4
4
5
1.2
0.8
5
–VS
5
µA
+VS – 4 V
MHz
V
2.0
V
20
µA
+VS
V
2
µs
–2–
REV. B

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