AD5623R(RevA) Ver la hoja de datos (PDF) - Analog Devices
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AD5623R Datasheet PDF : 28 Pages
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AD5623R/AD5643R/AD5663R
SPECIFICATIONS
AD5623R-5/AD5643R-5/AD5663R-5
VDD = 4.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREFIN = VDD; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE2
AD5663R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5643R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5623R
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Offset Error
Full-Scale Error
Gain Error
Zero-Scale Error Drift
Gain Temperature Coefficient
DC Power Supply Rejection Ratio
DC Crosstalk (External Reference)
DC Crosstalk (Internal Reference)
OUTPUT CHARACTERISTICS3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Current
Reference Input Range
Reference Input Impedance
REFERENCE OUTPUT
Output Voltage
Reference Temperature Coefficient3
Output Impedance
B Grade1
Min Typ
Max
16
±8
14
±2
12
±0.5
+2
±1
−0.1
±2
±2.5
−100
10
10
5
25
20
10
0
2
10
0.5
30
4
170
0.75
26
2.495
±5
±10
7.5
±16
±1
±4
±0.5
±1
±0.25
+10
±10
±1
±1.5
VDD
200
VDD
2.505
±10
Unit
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
mV
mV
% of FSR
% of FSR
μV/°C
ppm
dB
μV
μV/mA
μV
μV
μV/mA
μV
V
nF
nF
Ω
mA
μs
μA
V
kΩ
V
ppm/°C
ppm/°C
kΩ
Conditions/Comments
Guaranteed monotonic by design
Guaranteed monotonic by design
Guaranteed monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
Of FSR/°C
DAC code = midscale ; VDD = 5 V ± 10%
Due to full-scale output change;
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
Due to full-scale output change;
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
RL = ∞
RL = 2 kΩ
VDD = 5 V
Coming out of power-down mode; VDD = 5 V
VREF = VDD = 5.5 V
At ambient
MSOP package models
LFCSP package models
Rev. A | Page 3 of 28
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