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AD5539

Operational Amplifier Ultrahigh Frequency

Analog Devices 

AD5539

frequency. Both of these circuit techniques add a large amount

of leading phase shift at the crossover frequency, greatly aiding

stability.

The lag network (RLAG, CLAG) increases the feedback attenua-

tion, i.e., the amplifier operates at a higher noise gain, above

some frequency, typically one-tenth of the crossover frequency.

As an example, to achieve a noise gain of 5 at frequencies above

44 MHz, for the circuit of Figure 15, would require a network

of:

( ) RLAG =

R1

4R1 / R2 – 1

(3)

and . . .

( ) CLAG

=

2

π

RLAG

1

44

× 106

(4)

It is worth noting that an RLAG resistor may be used alone, to in-

crease the noise gain above 5 at all frequencies. However, this

approach has the disadvantage of also increasing the dc offset

and low frequency noise errors by an amount equal to the in-

crease in gain, in this case, by a factor of 5.

SOME PRACTICAL CIRCUITS

The preceding general principles may now be applied to some

actual circuits.

A General Purpose Inverter Circuit

Figure 17 is a general purpose inverter circuit operating at a

gain of –2.

For this circuit, the total capacitance at the inverting input is ap-

proximately 3 pF; therefore, CLEAD from Equations 1 and 2

needs to be approximately 1.5 pF. As shown in Figure 17, a

small trimmer is used to optimize the frequency response of this

circuit. Without a lag compensation network, the noise gain of

the circuit is 3.0 and, as shown in Figure 18, the output ampli-

tude remains within ± 0.5 dB to 170 MHz and the –3 dB band-

width is 200 MHz.

Figure 18. Response of the (Figure 17) Inverter Circuit

without a Lag Compensation Network

A lag network (Figure 15) can be added to improve the response

of this circuit even further as shown in Figures 19 and 20. In al-

most all cases, it is imperative to make capacitor CLEAD adjust-

able; in some cases, CLAG must also be variable. Otherwise,

component and circuit capacitance variations will dominate cir-

cuit performance.

Figure 19. Response of the (Figure 17) Inverter Circuit

with an RLAG Compensation Network Employed

Figure 17. A General Purpose Inverter Circuit

Figure 20. Response of the (Figure 17) Inverter Circuit

with an RLAG and a CLAG Compensation Network

Employed

–8–

REV. B

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