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AD1953YSTZ
(Rev.:RevA)

SigmaDSP™ 3-Channel, 26-Bit Signal Processing DAC

Analog Devices 

AD1953

PRODUCT OVERVIEW (continued from page 1)

An extensive SPI port allows click-free parameter updates, along

with readback capability from any point in the algorithm flow.

The AD1953 also includes ADI’s patented multibit Σ-Δ DAC

architecture. This architecture provides 112 dB SNR and dynamic

range and THD+N of –100 dB. These specifications allow the

AD1953 to be used in applications ranging from low end

boom-boxes to high end professional mixing/editing systems.

The AD1953 has a digital output that allows it to be used purely

as a DSP. This digital output can also be used to drive an exter-

nal DAC to extend the number of channels beyond the three

that are provided on the chip. This chip can be used with either

its default signal processing program or with a custom user-

designed program. Graphical programming tools are available

from ADI for custom programming.

Features

The AD1953 is comprised of a 26-bit DSP (48-bit with double-

precision) for interpolation and audio processing, three multibit

Σ-Δ modulators, and analog output drive circuitry. Other features

include an on-chip parameter RAM using a “safe-upload” feature

for transparent and simultaneous updates of filter coefficients.

Digital de-emphasis filters are also included. On-chip input

selectors allow up to three sources of serial data and master

clock to be selected. The 3-channel configuration is especially

useful for 2.1 playback systems that include two satellite speakers

and a subwoofer. The default program allows for independent

equalization and compression/limiting for the satellite and

subwoofer outputs. Figure 1 shows the block diagram of the device.

The AD1953 contains a program RAM that is booted from an

internal program ROM on power-up. Signal-processing param-

eters are stored in a 256-location parameter RAM, which is

initialized on power-up by an internal boot ROM. New values

are written to the parameter RAM using the SPI port. The

values stored in the parameter RAM control the IIR equalization

filters, the dual-band compressor/limiter, the delay values, and

the settings of the stereo spreading algorithm.

The AD1953 has a very sophisticated SPI port that supports

complete read/write capability of both the program RAM and

the parameter RAM. Two control registers are also provided to

control the chip serial modes and various other optional fea-

tures. Handshaking is included for ease of memory uploads/

downloads.

The AD1953 contains eight independent data-capture circuits

that can be programmed to tap the signal flow of the processor

at any point in the DSP algorithm flow. Two of these data-

capture circuits can be read back over the SPI port, and the

other six are fed to a serial output pin operating either in TDM

mode (for all six channels) or 2-channel mode for simple con-

nection to an external DAC. This allows the basic functionality

of the AD1953 to be easily extended.

The processor core in the AD1953 has been designed from the

ground up for straightforward coding of sophisticated compres-

sion/limiting algorithms. The AD1953 contains two independent

compressor/limiters with rms based amplitude detection and

attack/hold/release controls, together with an arbitrary compres-

sion curve that is loaded by the user into a lookup table that

resides in the parameter RAM. The compressor also features

look-ahead compression, which prevents compressor overshoots.

The AD1953 has a very flexible serial data input port that allows

for glueless interconnection to a variety of ADCs, DSP chips,

AES/EBU receivers, and sample rate converters. The AD1953

can be configured in left-justified, I2S, right-justified, or DSP

serial port compatible modes. It can support 16, 20, and 24 bits

in all modes. The AD1953 accepts serial audio data in MSB

first, twos complement format. The part can also be set up in a

4-channel serial input mode by simultaneously using the serial

input mux and the auxiliary serial input.

The AD1953 operates from a single 5 V power supply. It is

fabricated on a single monolithic integrated circuit and is housed

in a 48-lead LQFP package for operation over the temperature

range –40°C to +105°C.

SERIAL DATA I/O

GROUP

(2-CHANNEL

AND TDM)

AUX SERIAL

DATA INPUT

MASTER

CLOCK I/O

GROUP

SPI I/O

GROUP

DVDD AVDD ODVDD ZEROFLAG

3

3

3

3:1

3

AUDIO

DATA

3

MUX1

SERIAL

IN1

3:1

MCLK

MUX1

MCLK

GENERATOR1

(256/512 fS IN)

256/512 fS OUT

CONTROL

REGISTERS

3

SPI PORT

TRAP REG.

(I2S, SPI)

SAFELOAD

REGISTERS

VREF

RESETB MUTE DE-EMPHASIS

DATA MEMORY, 512 ؋ 26

26 ؋ 22

DSP CORE

DATA FORMAT:

3.23 (SINGLE PRECISION)

3.45 (DOUBLE PRECISION)

VOLTAGE

REFERENCE

DAC – L

DAC – R

DAC –SW2

BIAS

ANALOG

OUTPUTS

ANALOG

BIAS

PROGRAM

RAM

512 ؋ 35

PARAMETER

RAM

256 ؋ 22

COEFFICIENT

ROM

64 ؋ 22

MEMORY CONTROLLERS DCSOUT TRAP

DCSOUT

REV. A

FILTCAP

AGND

NOTES

3

1CONTROLLED THROUGH SPI CONTROL REGISTERS

2DAC DOES NOT USE DIGITAL INTERPOLATION

Figure 1. Block Diagram

–9–

DGND

2

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