AD10465BZ(RevA) Ver la hoja de datos (PDF) - Analog Devices

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AD10465BZ
(Rev.:RevA)

Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning

Analog Devices 

AD10465

1 See Table 3.

2 Gain tests are performed on AIN1 input voltage range.

3 Input capacitance specification combines AD8037 die capacitance and ceramic package capacitance.

4 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.

5 All ac specifications tested by driving ENCODE and ENCODE differentially.

6 Minimum and maximum conversion rates allow for variation in encode duty cycle of 50% ± 5%.

7 Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). ENCODE = 65 MSPS. SNR is

reported in dBFS, related back to converter full power.

8 Analog input signal power at –1 dBFS. Signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. ENCODE = 65 MSPS.

9 Analog input signal power swept from −1 dBFS to −60 dBFS; SFDR is the ratio of converter full scale to worst spur.

10 Both input tones at −7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermodulation product.

11 Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel.

12 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF degrade performance.

13 Supply voltage recommended operating range. AVCC can be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range

AVCC = 5.0 V to 5.25 V.

Rev. A | Page 5 of 24

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