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A4953ELJTR-T Ver la hoja de datos (PDF) - Allegro MicroSystems

Número de pieza
componentes Descripción
Fabricante
A4953ELJTR-T
Allegro
Allegro MicroSystems Allegro
A4953ELJTR-T Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
A4952 and
A4953
Full-Bridge DMOS PWM Motor Drivers
Package LJ, 8-Pin SOICN
with exposed thermal pad
4.90 ±0.10
8
2.41 NOM
B
A
12
3.30 NOM
3.90 ±0.10 6.00 ±0.20
8X
0.10 C
0.51
0.31
1.27 BSC
Branded Face
C
SEATING
PLANE
1.70 MAX
0.15
0.00
0.25
0.17
0.65
8
1.75
1.04 REF
1.27
2.41 5.60
1.27
0.40
0.25 BSC
SEATING PLANE
GAUGE PLANE
12
3.30
C PCB Layout Reference View
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface); dimensions may vary with device
C Reference land pattern layout (reference IPC7351
SOIC127P600X175-9AM); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, LLC
9
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com

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