A42MX09-3TQG176I Ver la hoja de datos (PDF) - Microsemi Corporation
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A42MX09-3TQG176I Datasheet PDF : 142 Pages
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40MX and 42MX FPGA Families
Output Drive Characteristics for 3.3 V PCI Signaling
Table 1-19 • DC Specification (3.3 V PCI Signaling)1
Symbol
Parameter
Condition
PCI
Min.
Max.
MX
Min.
Max.
Units
VCCI
VIH
VIL
IIH
Supply Voltage for I/Os
Input High Voltage
Input Low Voltage
Input High Leakage Current
VIN = 2.7V
3.0
3.6
3.0
3.6
V
0.5 VCC + 0.5 0.5 VCCI + 0.3
V
–0.5
0.8
–0.3
0.8
V
70
10
µA
IIL
Input Leakage Current
–70
–10
µA
VOH Output High Voltage
IOUT = –2 mA
0.9
3.3
V
VOL Output Low Voltage
IOUT = 3 mA, 6 mA
0.1
0.1 VCCI
V
CIN
Input Pin Capacitance
10
10
pF
CCLK
LPIN
CLK Pin Capacitance
Pin Inductance
5
12
20
10
pF
< 8 nH3
nH
Notes:
1. PCI Local Bus Specification, Version 2.1, Section 4.2.2.1.
2. Maximum rating for VCCI –0.5V to 7.0V.
3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and
capacitance.
Table 1-20 • AC Specifications for (3.3 V PCI Signaling)*
PCI
MX
Symbol
Parameter
Condition
Min.
Max. Min. Max. Units
ICL
Low Clamp Current
–5 < VIN ≤ –1 –25 + (VIN +1) /0.015
–60 –10 mA
Slew (r) Output Rise Slew Rate 0.2 V to 0.6 V load
1
4
1.8
2.8 V/ns
Slew (f) Output Fall Slew Rate 0.6 V to 0.2 V load
1
4
2.8
4.0 V/ns
Note: *PCI Local Bus Specification, Version 2.1, Section 4.2.2.2.
1-24
Revision 11
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