317697-001 Ver la hoja de datos (PDF) - Intel
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317697-001 Datasheet PDF : 69 Pages
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82575 Gigabit Ethernet Controller Datasheet
3.4
3.5
System Management Interface Signals
Symbol
SMBCLK
SMBD
SMBALRT_N
NCSI_CLK_IN
NCSI_CLK_OUT
NCSI_CRS_DV
NCSI_RXD[1]
NCSI_RXD[0]
NCSI_TX_EN
NCSI_TXD[1]
NCSI_TXD[0]
Type
Name and Function
SMB Clock
OD The SMB Clock signal is an open drain signals for the serial SMB
interface.
SMB Data
OD The SMB Data signal is an open drain signal for the serial SMB
interface.
SMB Alert
OD The SMB Alert signal is an open drain signal for serial SMB Port A. In
ASF mode, this signal acts as a power good input. It acts as an alert
input in 82559 compatible mode.
NCSI Reference Clock Input. Synchronous clock reference for
I
receive, transmit and control interface. It is a 50MHz clock /- 50
ppm.
NCSI Reference Clock Output. Synchronous clock reference for
O
receive, transmit and control interface. It is a 50MHz clock /- 50
ppm. Serves as a clock source to the BMC and Zoar (when
configured so).
O
Carrier Sense / Receive Data Valid
O
Receive Data. Data signals from the device to the BMC
I
Transmit Enable
I
Transmit Data. Data signals from BMC to the device
MDIO Signals
Symbol
MDC
MDIO
Type
I
I/O
Name and Function
Management Data Clock. Used by the PHY as a clock timing
reference for information transfer on the MDIO signal. The MDC is
not required to be a continuous signal and can be frozen when no
management data is transferred. The MDC signal has a maximum
operating frequency of 2.5MHz.
Management Data I/O. This internal signaling between the MAC and
PHY logically represents a bi-directional data signal used to transfer
control information and status to and from the PHY (to read and
write the PHY management registers ). Asserting and interpreting
value(s) on this interface requires knowledge of the special MDIO
protocol to avoid possible internal signal contention or
miscommunication to/from the PHY
12
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