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74VHC86CW Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
74VHC86CW
Fairchild
Fairchild Semiconductor Fairchild
74VHC86CW Datasheet PDF : 6 Pages
1 2 3 4 5 6
November 1992
Revised April 1999
74VHC86
Quad 2-Input Exclusive-OR Gate
General Description
The VHC86 is an advanced high speed CMOS Quad
Exclusive OR Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and on two supply systems such as battery back up. This
circuit prevents device destruction due to mismatched sup-
ply and input voltages.
Features
s High Speed: tPD = 4.8 ns (typ) at VCC = 5V
s Low Power Dissipation: ICC = 2 µA (Max.) @ TA = 25°C
s High Noise Immunity: VNIH = VNIL = 28% VCC (Min.)
s Power down protection is provided on all inputs
s Low Noise: VOLP = 0.8V (Max.)
s Pin and Function Compatible with 74HC86
Ordering Code:
Order Number
74VHC86M
74VHC86SJ
74VHC86MTC
Package Number
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC86N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A0–A3
B0–B3
O0–O3
Description
Inputs
Inputs
Outputs
Truth Table
A
B
O
L
L
L
L
H
H
H
L
H
H
H
L
© 1999 Fairchild Semiconductor Corporation DS011517.prf
www.fairchildsemi.com

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