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74VHC86SJ(2005) Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
74VHC86SJ
(Rev.:2005)
Fairchild
Fairchild Semiconductor Fairchild
74VHC86SJ Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
November 1992
Revised February 2005
74VHC86
Quad 2-Input Exclusive-OR Gate
General Description
The VHC86 is an advanced high speed CMOS Quad
Exclusive OR Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and on two supply systems such as battery back up. This
circuit prevents device destruction due to mismatched sup-
ply and input voltages.
Features
s High Speed: tPD 4.8 ns (typ) at VCC 5V
s Low Power Dissipation: ICC 2 PA (Max.) @ TA 25qC
s High Noise Immunity: VNIH VNIL 28% VCC (Min.)
s Power down protection is provided on all inputs
s Low Noise: VOLP 0.8V (Max.)
s Pin and Function Compatible with 74HC86
Ordering Code:
Order Number
Package
Number
Package Description
74VHC86M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VHC86SJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC86MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC86MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
74VHC86N
N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STS-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A0–A3
B0–B3
O0–O3
Description
Inputs
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation DS011517
Truth Table
A
L
L
H
H
B
O
L
L
H
H
L
H
H
L
www.fairchildsemi.com

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