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PCF85116-3T/01

2048 × 8-bit CMOS EEPROM with I2C-bus interface

Philips Electronics 

Philips Semiconductors

PCF85116-3

2048 × 8-bit CMOS EEPROM with I2C-bus interface

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

S 1 0 1 0 B3 B2 B1 0 A WORD ADDRESS A

DATA N

A

DATA N + 1

A

SLAVE ADDRESS R/W

auto increment

word address

auto increment

word address

acknowledge

from slave

DATA N + 31

AP

Fig 6. Page write operation; 32 bytes.

last byte

auto increment

word address

 === '

8.1.5 Read operations

Read operations are initiated in the same manner as write operations with the

exception that the LSB of the slave address (R/W) is set to logic 1.

There are three basic read operations: current address read, random read, and

sequential read.

Remark: During read operations all bits of the memory address are incremented

after each transmission of a data byte. Contrary to write operations, an overflow of the

memory address occurs from 2047 to 0 (see Figure 8).

9397 750 14217

Product data

Rev. 04 — 25 October 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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