74LVC3G07GD,125 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74LVC3G07GD,125 Datasheet PDF : 21 Pages
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NXP Semiconductors
74LVC3G07
Triple buffer with open-drain output
Table 9. Measurement points
Supply voltage
Input
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VM
0.5 VCC
0.5 VCC
1.5 V
3.0 V to 3.6 V
1.5 V
4.5 V to 5.5 V
0.5 VCC
Output
VM
0.5 VCC
0.5 VCC
1.5 V
1.5 V
0.5 VCC
VX
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Fig 9.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VI
VCC
VCC
2.7 V
2.7 V
VCC
tr = tf
2.0 ns
2.0 ns
2.5 ns
2.5 ns
2.5 ns
Load
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 k
500
500
500
500
VEXT
tPZL, tPLZ
2 VCC
2 VCC
6V
6V
2 VCC
74LVC3G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 9 April 2013
© NXP B.V. 2013. All rights reserved.
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