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74LVC1G07GN Datasheet PDF : 17 Pages
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NXP Semiconductors
74LVC1G07
Buffer with open-drain output
Table 9. Measurement points
Supply voltage
Input
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VM
0.5VCC
0.5VCC
1.5 V
3.0 V to 3.6 V
1.5 V
4.5 V to 5.5 V
0.5VCC
Output
VM
0.5VCC
0.5VCC
1.5 V
1.5 V
0.5VCC
VX
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Fig 8.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VI
VCC
VCC
2.7 V
2.7 V
VCC
tr, tf
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
30 pF
50 pF
50 pF
50 pF
RL
1 kΩ
500 Ω
500 Ω
500 Ω
500 Ω
VEXT
tPZL, tPLZ
2VCC
2VCC
6V
6V
2VCC
74LVC1G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 24 August 2010
© NXP B.V. 2010. All rights reserved.
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