74LCX16543MEAX Ver la hoja de datos (PDF) - Fairchild Semiconductor
Número de pieza
componentes Descripción
Fabricante
74LCX16543MEAX
Fairchild Semiconductor
74LCX16543MEAX Datasheet PDF : 9 Pages
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Pin Descriptions
Pin Names
Description
OEABn
OEBAn
CEABn
CEBAn
LEABn
LEBAn
A0–A15
B0–B15
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or B-to-A 3-STATE Outputs
B-to-A Data Inputs or A-to-B 3-STATE Outputs
Data I/O Control Table
Inputs
Latch
Status
Output
Buffers
CEABn LEABn OEABn
H
X
X
X
H
X
L
L
X
X
X
H
L
X
L
(Byte n)
Latched
Latched
Transparent
—
—
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn
(Byte n)
High Z
—
—
High Z
Driving
Functional Description
The LCX16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the A-to-
B Enable (CEABn) input must be LOW in order to enter
data from A0–A15 or take data from B0–B15, as indicated in
the Data I/O Control Table. With CEABn LOW, a LOW sig-
nal on the A-to-B Latch Enable (LEABn) input makes the A-
to-B latches transparent; a subsequent LOW-to-HIGH tran-
sition of the LEABn signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With CEABn and OEABn both LOW, the 3-STATE B output
buffers are active and reflect the data present at the output
of the A latches. Control of data flow from B to A is similar,
but using the CEBAn, LEBAn and OEBAn inputs.
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