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74HCT240-Q100 Datasheet PDF : 16 Pages
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NXP Semiconductors
74HC240-Q100; 74HCT240-Q100
Octal buffer/line driver; 3-state; inverting
Table 7. Dynamic characteristics …continued
GND = 0 V; for load circuit see Figure 8.
Symbol Parameter
Conditions
Min
ten
enable time
tdis
disable time
tt
transition time
CPD
power dissipation
capacitance
74HCT240-Q100
nOE to nYn; see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
nOE to nYn or see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
per transceiver;
VI = GND to VCC
tpd
propagation delay nAn to nYn;
see Figure 6
ten
enable time
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
nOE to nYn; VCC = 4.5 V; see
Figure 7
tdis
disable time
nOE to nYn; VCC = 4.5 V; see
Figure 7
tt
transition time
VCC = 4.5 V; see Figure 6
CPD
power dissipation per transceiver;
capacitance
VI = GND to VCC 1.5 V
[2]
-
-
-
[3]
-
-
-
[4]
-
-
-
[5]
-
[1]
-
-
[2]
-
[3]
-
[4]
-
[5]
-
[1] tpd is the same as tPHL and tPLH.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPHZ and tPLZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
25 C
Typ
39
14
11
41
15
12
14
5
4
30
11
9
13
13
5
30
40 C to +125 C Unit
Max Max
Max
(85 C) (125 C)
150
190
30
38
26
33
225 ns
45 ns
38 ns
150
190
30
38
26
33
225 ns
45 ns
38 ns
60
75
12
15
10
13
-
-
90 ns
18 ns
15 ns
- pF
20
25
-
-
30
38
25
31
12
15
-
-
30 ns
- ns
45 ns
38 ns
18 ns
- pF
74HC_HCT240_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 30 July 2012
© NXP B.V. 2012. All rights reserved.
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