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N74F244N Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza
componentes Descripción
Fabricante
N74F244N
Philips
Philips Electronics Philips
N74F244N Datasheet PDF : 12 Pages
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Philips Semiconductors
Octal buffers (3-State)
Product specification
74F244/74F244B
FEATURES
Octal bus interface
3-State output buffer sink 64mA
15mA source current
Guaranteed output skew less than 2.0ns (74F244B)
Reduced ground bounce (74F244B)
Reduced ICC (74F244B)
Reduced loading (74F244B IIL = 40µA)
Split lead frame offers increased noise immunity (74F244B)
Industrial temperature range available (-40°C to +85°C) for
74F244
74F244 available in SSOP Type II package
DESCRIPTION
The 74F244 is an octal buffer that is ideal for driving bus lines of
buffer memory address registers. The outputs are all capable of
sinking 64mA and sourcing up to 15mA, producing very good
capacitive drive characteristics. The device features two output
enables, OEa and OEb, each controlling four of the 3-State outputs.
The 74F244B is functionally equivalent to the 74F244. It has been
designed to reduce effects of ground noise. Other advantages are
noted in the features.
TYPE
74F244
74F244B
TYPICAL
PROPAGATION
DELAY
4.0ns
4.0ns
TYPICAL SUPPLY
CURRENT (TOTAL)
53mA
33mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
20-pin plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
N74F244N, N74F244BN
INDUSTRIAL RANGE
VCC = 5V ±10%,
Tamb = -40°C to +85°C
I74F244N
20-pin plastic SOL
N74F244D, N74F244BD
I74F244D
20-pin plastic SSOP II
N74F244DB
PKG DWG #
SOT146-1
SOT163-1
SOT339-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
Ian, Ibn
Data inputs (74F244)
Data inputs (74F244B)
OEa, OEb
Output enable inputs (active low) (74F244)
Output enable inputs (active low) (74F244B)
Yan, Ybn
Data outputs
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
74F (U.L.)
HIGH/LOW
1.0/2.67
1.0/0.067
1.0/1.67
1.0/0.067
750/106.7
LOAD VALUE
HIGH/LOW
20µA/1.6mA
20µA/40µA
20µA/1.0mA
20µA/40µA
15mA/64mA
PIN CONFIGURATION
LOGIC SYMBOL
OEa 1
Ia0 2
Yb0 3
Ia1 4
Yb1 5
Ia2 6
Yb2 7
Ia3 8
Yb3 9
GND 10
20 VCC
19 OEb
18 Ya0
17 Ib0
16 Ya1
15 Ib1
14 Ya2
13 Ib2
12 Ya3
11 Ib3
SF00227
2 4 6 8 17 15 13 11
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
1
OEa
19
OEb
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
VCC = Pin 20
GND = Pin 10
18 16 14 12 3 5 7 9
SF00228
1994 Dec 5
2
853-0357 14381

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