MK74CB115 Ver la hoja de datos (PDF) - Integrated Circuit Systems
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MK74CB115 Datasheet PDF : 5 Pages
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MK74CB115
1 to 16 Buffalo™ Clock Driver
Pin Assignment
Suggested Layout
OE1 1
Q0 2
Q1 3
Q2 4
VDD 5
VDD 6
Q3 7
Q4 8
GND 9
GND 10
Q5 11
Q6 12
Q7 13
IN 14
28 OE2
27 Q15
26 Q14
25 Q13
24 VDD
23 VDD
22 Q12
21 Q11
20 GND
19 GND
18 Q10
17 Q9
16 Q8
15 OE0
V
0.1µF
G
V
0.1µF
G
For simplicity, series terminating resistors (required) are
not shown for the outputs, but should be placed as close to
the device as possible. It is most critical to have the 0.1µF
decoupling capacitors closest.
Pin Descriptions
Number
Name
1
OE1
2, 3
Q0, Q1
4, 7, 8 Q2, Q3, Q4
5, 6
VDD
9, 10
GND
11, 12, 13 Q5, Q6, Q7
14
IN
15
OE0
16, 17, 18 Q8, Q9, Q10
19, 20
GND
21, 22, 25 Q11, Q12, Q13
23, 24
VDD
26, 27 Q14, Q15
28
OE2
Type
I
O
O
P
P
O
I
I
O
P
O
P
O
I
V = connect to VDD G = connect to GND
Description
Output Enable. Tri-states Q2 to Q7 clock outputs when this input is low. Internal pull-up.
Clock outputs.
Clock outputs.
Power supply. Connect to +3.3 V or 5 V.
Connect to ground.
Clock outputs.
Clock input for 16 buffers.
Output Enable. Tri-states Q8 to Q13 clock outputs when this input is low. Internal pull-up.
Clock outputs.
Connect to ground.
Clock outputs.
Power supply. Connect to +3.3 V or 5 V.
Clock outputs.
Output Enable. Tri-states Q0, Q1, Q15 and Q14 clock outputs when this input is low.
Internal pull-up.
Type: I = Input, O = output, P = power supply connection
MDS 74CB115 D
2
Revision 020800
Printed 11/16/00
Integrated Circuit Systems, Inc. • 525 Race St. • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com
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