DSP56F827FG80 Ver la hoja de datos (PDF) - Motorola => Freescale

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DSP56F827FG80

16-bit Hybrid Controller

Motorola => Freescale 

Freescale Semiconductor, Inc.

Table 3. 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)

Signal Name Pin No.

Type

Description

D0

(GPIOG0)

D1

(GPIOG1)

D2

(GPIOG2)

D3

(GPIOG3)

D4

(GPIOG4)

D5

(GPIOG5)

D6

(GPIOG6)

D7

(GPIOG7)

D8

(GPIOG8)

D9

(GPIOG9)

D10

(GPIOG10)

D11

(GPIOG11)

D12

(GPIOG12)

D13

(GPIOG13)

D14

(GPIOG14)

D15

(GPIOG15)

PS

(PCS0)

125 Input/Output Data Bus—D0–D15 specify the data for external Program or Data

memory accesses. D0-D15 are tri-stated when the external bus is

inactive.

Input/Output Port G GPIO—These 16 General Purpose I/O (GPIO) pins can be

individually programmed as input or output pins.

126

After reset, the default state is Address Bus.

127

128

1

2

3

6

7

8

9

10

11

12

13

14

18

Output

Program Memory Select—PS is asserted low for external program

memory access. This pin can also be programmed as a programmable

chip select.

10

56F827 Technical Data

For More Information On This Product,

Go to: www.freescale.com

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