3D3522 Ver la hoja de datos (PDF) - Data Delay Devices
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3D3522 Datasheet PDF : 4 Pages
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MONOLITHIC MANCHESTER
DECODER
(SERIES 3D3522)
3D3522
ddaeltaay 3
devices, inc.
FEATURES
• All-silicon, low-power CMOS
technology
• 3.3V operation
• CMOS compatible inputs and
outputs
• Vapor phase, IR and wave
solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
• Maximum data rate: 50 MBaud
• Data rate range: ±15%
PACKAGES
RX 1
CLK 2
N/C 3
GND 4
8 VDD
7 N/C
6 N/C
5 DATB
RX 1 14 VDD
N/C 2 13 N/C
N/C 3 12 N/C
CLK 4 11 N/C
N/C 5 10 N/C
N/C 6 9 N/C
GND 7 8 DATB
3D3522M-xxx DIP (.300)
3D3522H-xxx Gull Wing (.300)
3D3522Z-xxx SOIC (.150)
3D3522-xxx DIP (.300)
3D3522G-xxx Gull Wing (.300)
3D3522D-xxx SOIC (.150)
For mechanical dimensions, click here.
For package marking details, click here.
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D3522 product family consists of monolithic CMOS Manchester
RX Signal Input
Decoders. The unit accepts at the RX input a bi-phase-level,
CLK Signal Output (Clock)
embedded-clock signal. In this encoding mode, a logic one is
DATB Signal Output (Data)
represented by a high-to-low transition within the bit cell, while a logic
VDD +3.3 Volts
zero is represented by a low-to-high transition. The recovered clock
GND Ground
and data signals are presented on CLK and DATB, respectively, with
the data signal inverted. The operating baud rate (in MBaud) is specified by the dash number. The input
baud rate may vary by as much as ±15% from the nominal device baud rate without compromising the
integrity of the information received.
Because the 3D3522 is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
The all-CMOS 3D3522 integrated circuit has been designed as a reliable, economic alternative to hybrid
Manchester Decoders. It is CMOS-compatible and is offered in standard 8-pin and 14-pin auto-insertable
DIPs and space saving surface mount 8-pin and 14-pin SOICs.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D3522-0.5
3D3522-1
3D3522-5
3D3522-10
3D3522-20
3D3522-25
3D3522-50
BAUD RATE (MBaud)
Nominal Minimum Maximum
0.50
0.43
0.57
1.00
0.85
1.15
5.00
4.25
5.75
10.00
8.50
11.50
20.00
17.00
23.00
25.00
21.25
28.75
50.00
42.50
57.50
NOTES: Any baud rate between 0.5 and 50 MBaud not shown is also available at no extra cost.
2006 Data Delay Devices
Doc #06005
DATA DELAY DEVICES, INC.
1
5/8/2006
3 Mt. Prospect Ave. Clifton, NJ 07013
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