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MAX3876E/D Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
MAX3876E/D Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2.5Gbps, Low-Power, +3.3V
Clock Recovery and Data Retiming IC
VCC
PECL
LEVELS
RT*
RT*
0.1µF 25
SDI+
ZIN = 50
100
0.1µF
25SDI- ZIN = 50
MAX3876
*SELECT RT SUCH THAT THE CORRECT PECL COMMON-MODE LEVEL
IS ACHIEVED (TYPICAL PECL OUTPUT CURRENT = 14mA).
Figure 7. PECL-to-CML Interface
VCC = 3.3V
3.3V
VCC = 3.3V
226
82
PECL
OUTPUT
243
3.3V
SDI+
ZIN = 50
226
82
243
SDI-
ZIN = 50
MAX3876
Figure 8. Direct Coupling of a PECL Output into the MAX3876
8 _______________________________________________________________________________________

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