AS6UA5128-BC Ver la hoja de datos (PDF) - Alliance Semiconductor

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componentes Descripción

Fabricante

AS6UA5128-BC

2.3V to 3.6V 512K×8 Intelliwatt low-power CMOS SRAM

Alliance Semiconductor 

AS6UA5128

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Read cycle (over the operating range)

–55

Parameter

Symbol Min Max

Read cycle time

tRC

55

–

Address access time

tAA

–

55

Chip select (CS) access time

tACS

–

55

Output enable (OE) access time

tOE

–

25

Output hold from address change tOH

10

–

CS low to output in low Z

tCLZ

10

–

CS high to output in high Z

tCHZ

0

20

OE low to output in low Z

tOLZ

5

–

OE high to output in high Z

tOHZ

0

20

Power up time

tPU

0

–

Power down time

tPD

–

55

–70

Min Max Unit

70

–

ns

–

70

ns

–

70

ns

–

35

ns

10

–

ns

10

–

ns

0

20

ns

5

–

ns

0

20

ns

0

–

ns

–S

70

ns

Notes

3

3

5

4, 5

4, 5

4, 5

4, 5

4, 5

S

Key to switching waveforms

Rising input

Falling input

Read waveform 1 (address controlled)

tRC

Address

tOH

tAA

DOUT

Previous data valid

Data valid

Undefined/don’t care

tOH

Read waveform 2 (CS, OE controlled)

tRC1

CS

tOE

OE

DOUT

tOLZ

tACE

tOHZ

tCHZ

Data valid

Supply

current

tCLZ

tPU

50%

tPD

ICC

50%

ISB

9/21/01; v.1.2

Alliance Semiconductor

P. 4 of 9

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