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29F1610A Ver la hoja de datos (PDF) - Macronix International

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29F1610A Datasheet PDF : 39 Pages
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MX29F1610A
WRITE OPERATIONS
Commands are written to the COMMAND INTERFACE
REGISTER (CIR) using standard microprocessor write
timings. The CIR serves as the interface between the
microprocessor and the internal chip operation. The CIR
can decipher Read Array, Read Silicon ID, Erase and
Program command. In the event of a read command, the
CIR simply points the read path at either the array or the
silicon ID, depending on the specific read command
given. For a program or erase cycle, the CIR informs the
write state machine that a program or erase has been
requested. During a program cycle, the write state
machine will control the program sequences and the CIR
will only respond to status reads. During a sector/chip
erase cycle, the CIR will respond to status reads and
erase suspend. After the write state machine has
completed its task, it will allow the CIR to respond to its full
command set. The CIR stays at read status register
mode until the microprocessor issues another valid
command sequence.
Device operations are selected by writing commands into
the CIR. Table 3 below defines 16 Mbit flash family
command.
TABLE 3. COMMAND DEFINITIONS
Command
Sequence
Bus Write
Cycles Req'd
First Bus
Write Cycle
Addr
Data
Second Bus
Write Cycle
Addr
Data
Third Bus
Write Cycle
Addr
Data
Fourth Bus
Addr
Read/Write Cycle Data
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr
Data
Addr
Data
Read/
Reset
4
Silicon Page/Byte Chip
ID Read Program Erase
4
4
6
Sector Erase Erase Read
Clear
Erase Suspend Resume Status Reg. Status Reg.
6
1
1
4
3
5555H
AAH
5555H 5555H 5555H
AAH
AAH
AAH
5555H
AAH
XXXX
B0H
2AAAH 2AAAH 2AAAH 2AAAH 2AAAH
55H
55H
55H
55H
55H
5555H
F0H
5555H 5555H 5555H
90H
A0H
80H
5555H
80H
RA 00H/01H PA
RD C2H/FAH PD
(FBH)
5555H
AAH
5555H
AAH
2AAAH 2AAAH
55H
55H
5555H
SA
10H
30H
XXXX
D0H
5555H
AAH
2AAAH
55H
5555H
70H
X
SRD
5555H
AAH
2AAAH
55H
5555H
50H
P/N: PM0506
REV.1.7, JUN. 15, 2001
6

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