A28F200BX-B Ver la hoja de datos (PDF) - Intel
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componentes Descripción
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A28F200BX-B Datasheet PDF : 33 Pages
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A28F200BX-T B
When RP is at ground the WSM is reset the
Status Register is cleared and the entire device is
protected from being written to This feature pre-
vents data corruption and protects the code stored
in the device during system reset The system Reset
pin can be tied to RP to reset the memory to nor-
mal read mode upon activation of the Reset pin
With on-chip program erase automation in the
2 Mbit family and the RP functionality for data pro-
tection when the CPU is reset and even if a program
or erase command is issued the device will not rec-
ognize any operation until RP returns to its normal
state
For the A28F200BX Byte-wide or Word-wide In-
put Output Control is possible by controlling the
BYTE pin When the BYTE pin is at a logic low
the device is in the byte-wide mode (x8) and data is
read and written through DQ 0 7 During the byte-
wide mode DQ 8 14 are tri-stated and DQ15 Ab1
becomes the lowest order address pin When the
BYTE pin is at a logic high the device is in the
word-wide mode (x16) and data is read and written
through DQ 0 15
1 2 Applications
The 2-Mbit boot block flash family combines high
density high performance cost-effective flash mem-
ories with blocking and hardware protection capabili-
ties Its flexibility and versatility will reduce costs
throughout the product life cycle Flash memory is
ideal for Just-In-Time production flow reducing sys-
tem inventory and costs and eliminating component
handling during the production phase During the
product life cycle when code updates or feature en-
hancements become necessary flash memory will
reduce the update costs by allowing either a user-
performed code change via floppy disk or a remote
code change via a serial link The 2-Mbit boot block
flash family provides full function blocked flash
memories suitable for a wide range of automotive
applications
4
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