M27W201-100N6TR Ver la hoja de datos (PDF) - STMicroelectronics

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M27W201-100N6TR

2 Mbit (256Kb x 8) Low Voltage UV EPROM and OTP EPROM

STMicroelectronics 

Device Description

M27W201

2.6

Presto II programming algorithm

Presto II Programming Algorithm allows the whole array to be programmed with a

guaranteed margin, in a typical time of 26.5 seconds. Programming with Presto II consists of

applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see

Figure 5). During programming and verify operation, a Margin mode circuit is automatically

activated in order to guarantee that each cell is programmed with enough margin. No

overprogram pulse is applied since the verify in Margin mode at VCC much higher than 3.6V,

provides the necessary margin to each programmed cell.

Figure 5. Programming flowchart

VCC = 6.25V, VPP = 12.75V

n=0

NO

++n

= 25

YES

P = 100µs Pulse

NO

VERIFY

YES

++ Addr

FAIL

Last NO

Addr

YES

CHECK ALL BYTES

1st: VCC = 5V

2nd: VCC = 2.7V

AI00715D

2.7

Program Inhibit

Programming of multiple M27W201s in parallel with different data is also easily

accomplished. Except for E, all like inputs including G of the parallel M27W201 may be

common. A TTL low level pulse applied to a M27W201's P input, with E low and VPP at

12.75V, will program that M27W201. A high level E input inhibits the other M27W201s from

being programmed.

2.8

Program Verify

A verify (read) should be performed on the programmed bits to determine that they were

correctly programmed. The verify is accomplished with E and G at VIL, P at VIH, VPP at

12.75V and VCC at 6.25V.

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