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10020EV8

ECL programmable array logic

Philips Electronics 

Philips Semiconductors Programmable Logic Devices

ECL programmable array logic

Product specification

10H20EV8/10020EV8

TIMING DIAGRAMS

I, I/O

(INPUT)

CLK

I/O

(REGISTERED

OUTPUT)

I/O

(COMBINATORIAL

OUTPUT)

50%

tIS

50%

tIH

50%

50%

50%

tCKH

tCKO

tCK

P

50%

tCKL

tPD

50%

Flip-Flop and Gate Outputs

0V

REGISTERED

ACTIVE-LOW

OUTPUT

VEE = –4.94 10H20EV8

VEE = –4.2 10020EV8

VEE

tPPR

I, I/O

(INPUT)

50%

tIS

tCLK

50%

50%

Power-On Reset

October 22, 1993

123

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