DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

24AA01-/SM Ver la hoja de datos (PDF) - Microchip Technology

Número de pieza
componentes Descripción
Fabricante
24AA01-/SM
Microchip
Microchip Technology Microchip
24AA01-/SM Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
24AA01/24LC01B
4.0 WRITE OPERATION
4.1 Byte Write
Following the START condition from the master, the
device code (4 bits), the block address (3 bits, don’t
cares) and the R/W bit which is a logic LOW is placed
onto the bus by the master transmitter. This indicates to
the addressed slave receiver that a byte with a word
address will follow after it has generated an acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word address
and will be written into the address pointer of the
24XX01. After receiving another acknowledge signal
from the 24XX01, the master device will transmit the
data word to be written into the addressed memory
location. The 24XX01 acknowledges again and the
master generates a STOP condition. This initiates the
internal write cycle, and during this time the 24XX01
will not generate acknowledge signals (Figure 4-1).
FIGURE 4-1: BYTE WRITE
S
BUS ACTIVITY T
MASTER
A
R
T
CONTROL
BYTE
SDA LINE
S
A
BUS ACTIVITY
C
K
4.2 Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX01 in the same way as
in a byte write. But instead of generating a STOP con-
dition the master transmits up to 8 data bytes to the
24XX01, which are temporarily stored in the on-chip
page buffer and will be written into the memory after the
master has transmitted a STOP condition. After the
receipt of each word, the four lower order address
pointer bits are internally incremented by ‘1’. The
higher order 7 bits of the word address remains con-
stant. If the master should transmit more than 8 words
prior to generating the STOP condition, the address
counter will roll over and the previously received data
will be overwritten. As with the byte write operation,
once the STOP condition is received an internal write
cycle will begin (Figure 4-2).
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer multi-
ples of the page buffer size (or ‘page size’)
and end at addresses that are integer mul-
tiples of [page size - 1]. If a page write com-
mand attempts to write across a physical
page boundary, the result is that the data
wraps around to the beginning of the cur-
rent page (overwriting data previously
stored there), instead of being written to
the next page as might be expected. It is
therefore necessary for the application
software to prevent page write operations
that would attempt to cross a page bound-
ary.
WORD
ADDRESS
A
C
K
DATA
S
T
O
P
P
A
C
K
FIGURE 4-2: PAGE WRITE
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T CONTROL
A
R
BYTE
T
WORD
ADDRESS (n)
S
A
A
C
C
K
K
DATA (n)
DATA (n + 1)
S
T
DATA (n + 7)
O
P
P
A
A
A
C
C
C
K
K
K
2002 Microchip Technology Inc.
DS21711A-page 7

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]