S3C6410 Ver la hoja de datos (PDF) - Samsung

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S3C6410

RISC Microprocessor

Samsung 

Table of Contents (Continued)

Chapter 12 Vectored Interrupt Controllers

12.1 Overview................................................................................................................................................12-1

12.2 Features ................................................................................................................................................12-1

12.3 Interrupt Sources...................................................................................................................................12-2

12.4 Function.................................................................................................................................................12-5

12.4.1 Block Diagram................................................................................................................................12-5

12.5 Summary of VIC registers .....................................................................................................................12-6

12.6 Register Descriptions ............................................................................................................................12-9

12.6.1 IRQ Status Register, VICIRQSTATUS ..........................................................................................12-9

12.6.2 FIQ Status Register, VICFIQSTATUS ...........................................................................................12-9

12.6.3 Raw Interrupt Status Register, VICRAWINTR...............................................................................12-10

12.6.4 Interrupt Select Register, VICINTSELECT ....................................................................................12-10

12.6.5 Interrupt Enable Register, VICINTENABLE...................................................................................12-11

12.6.6 Interrupt Enable Clear, VICINTENCLEAR.....................................................................................12-11

12.6.7 Software Interrupt Register, VICSOFTINT ....................................................................................12-12

12.6.8 Software Interrupt Clear Register, VICSOFTINTCLEAR...............................................................12-12

12.6.9 Protection Enable Register, VICPROTECTION ............................................................................12-13

12.6.10 Software Priority Mask Register, VICSWPRIORITYMASK .........................................................12-13

12.6.11 Vector Priority Register for Daisy Chain ......................................................................................12-14

12.6.12 Vector Address Regisgers, VICVECTADDR[0-31]......................................................................12-15

12.6.13 Vector Priority Registers, VICVECTPRIORITY[0-31] ..................................................................12-15

12.6.14 Vector Address Register, VICADDRESS ....................................................................................12-16

Chapter 13

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Security SUB-Systems

13.1 Overview................................................................................................................................................13-1

13.2 Features ................................................................................................................................................13-1

13.3 Programming Guide ..............................................................................................................................13-3

13.3.1 AES ................................................................................................................................................13-3

13.3.2 TDES..............................................................................................................................................13-4

13.3.3 SHA-1 & PRNG..............................................................................................................................13-5

13.4 Special Function Registers ...................................................................................................................13-6

13.4.1 Security Sub-system Register Map ...............................................................................................13-6

13.5 DMA & Interrupt control module ............................................................................................................13-11

13.5.1 Security sub-system DMA & interrupt register...............................................................................13-11

13.6 Security sub-system RX FIFO module..................................................................................................13-12

13.6.1 FIFO-RX Control Register..............................................................................................................13-12

13.6.2 FIFO-RX Message Length Register ..............................................................................................13-13

13.6.3 FIFO-RX Block Size Register ........................................................................................................13-13

13.6.4 FIFO-RX Destination Address Register.........................................................................................13-13

13.6.5 FIFO-RX Message Length Counter ...............................................................................................13-14

13.6.6 FIFO-RX Write Buffer.....................................................................................................................13-14

xiv

S3C6410X_USER’S MANUAL_REV 1.00

datasheet pdf - http://www.DataSheet4U.net/

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