Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
120
Pder
(%)
80
03aa11
120
Ider
(%)
80
03aa19
40
40
0
0
50
100
150
200
Tamb (°C)
Pder = P-------P----t--o---t------- × 100%
t o t ( 25 °C )
Fig 1. Normalized total power dissipation as a
function of ambient temperature.
0
0
50
100
150
200
Tamb (°C)
Ider = -I-------I--D--------- × 100%
D ( 25 °C )
Fig 2. Normalized continuous drain current as a
function of ambient temperature.
102
ID
(A)
Limit RDSon = VDS / ID
10
1
DC
10-1
03ap01
tp = 10 µ s
1 ms
10 ms
100 ms
10 s
10-2
10-1
1
10
102
VDS (V)
Tamb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 12899
Product data
Rev. 02 — 17 February 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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