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TEA1738T Ver la hoja de datos (PDF) - NXP Semiconductors.

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TEA1738T
NXP
NXP Semiconductors. NXP
TEA1738T Datasheet PDF : 21 Pages
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NXP Semiconductors
TEA1738T; TEA1738LT
GreenChip SMPS control IC
7. Functional description
7.1 General control
The TEA1738(L) contains a flyback circuit controller, a typical configuration of which is
shown in Figure 3.
D1
R3
C1
R1
C2
R2
R4
Θ
O1
VINSENSE 5
4 ISENSE
PROTECT
CTRL
OPTIMER
6 TEA1738T 3 DRIVER
7 TEA1738LT 2 GND
8
1 VCC
C4 R8
C5
Fig 3. Typical configuration
T1
S1
R10
R6
C6
D3
C7
Z1
O1
R9
D2
001aan169
7.2 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the VCC pin is charged from the high voltage mains via resistor
R3.
If VCC is lower than Vstartup, the IC current consumption is low (10 μA typical). When VCC
reaches Vstartup the IC first waits for pin VINSENSE to reach the Vstart(VINSENSE) voltage
and for pin PROTECT to reach the Vdet(L)(PROTECT) voltage. When both levels are
reached, the IC charges the ISENSE pin to the Vstart(soft) level and starts switching. In a
typical application the supply voltage is taken over by the auxiliary winding of the
transformer.
If a protection is triggered the controller stops switching. Depending on the protection
triggered it either causes a restart or latches the converter to an off-state.
A restart caused by a protection rapidly charges the OPTIMER pin to 4.5 V (typical). The
TEA1738(L) enters Power-down mode until the OPTIMER pin discharges down to
1.2 V (typical). In Power-down mode, the IC consumes a very low supply current
(10 μA typical) and the VCC pin is clamped at 22 V (typical) by an internal clamp circuit.
When the voltage on pin OPTIMER drops below 1.2 V (typical) and the VCC pin voltage is
above the VCC start-up voltage (see Figure 4), the IC restarts.
When a latched protection is triggered, the TEA1738(L) immediately enters Power-down
mode. The VCC pin is clamped to a voltage just above the latch protection reset voltage
(Vrst(latch) + 1 V).
TEA1738T_TEA1738LT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 January 2011
© NXP B.V. 2011. All rights reserved.
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