AD5381 Ver la hoja de datos (PDF) - Analog Devices

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Fabricante

AD5381

40-Channel, 3 V/5 V, Single-Supply, 12-Bit, denseDAC

Analog Devices 

AD5381

SCLK

SYNC

DIN

SDO

SCLK

SYNC

DIN

SDO

LDAC

t1

SCLK

24

24

SYNC

t4

t7

t3

t6

t8 t9

t2

t5

DIN

BUSY

LDAC1

VOUT1

LDAC2

VOUT2

DB23

DB0

t10

t11

t12

t13

t15

t17

t14

t13

t16

t17

CLR

t18

t19

VOUT

1LDAC ACTIVE DURING BUSY.

2LDAC ACTIVE AFTER BUSY.

Figure 3. Serial Interface Timing Diagram (Standalone Mode)

24

48

t7A

DB23

DB0

DB23

DB0

INPUT WORD SPECIFIES

REGISTER TO BE READ

DB23

NOP CONDITION

DB0

UNDEFINED

SELECTED REGISTER

DATA CLOCKED OUT

Figure 4. Serial Interface Timing Diagram (Data Readback Mode)

t1

t7

t4

24

t3

t2

48

t21

t22

t8 t9

DB23

DB0 DB23

DB0

INPUT WORD FOR DAC N

t20

INPUT WORD FOR DAC N + 1

DB23

DB0

UNDEFINED

INPUT WORD FOR DAC N

t13

t23

Figure 5. Serial Interface Timing Diagram (Daisy-Chain Mode)

Rev. E | Page 10 of 40

Data Sheet

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