AD5381
Parameter
LOGIC OUTPUTS (BUSY, SDO)3
VOL, Output Low Voltage
VOH, Output High Voltage
High Impedance Leakage Current
High Impedance Output Capacitance
LOGIC OUTPUT (SDA)3
VOL, Output Low Voltage
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
AVDD
DVDD
Power Supply Sensitivity3
∆Midscale/∆ΑVDD
AIDD
DIDD
AIDD (Power-Down)
DIDD (Power-Down)
Power Dissipation
AD5381-31
0.4
DVDD – 0.5
±1
5
0.4
0.6
±1
8
2.7/3.6
2.7/5.5
–85
0.375
0.475
1
2
20
48
Unit
V max
V min
µA max
pF typ
V max
V max
µA max
pF typ
V min/max
V min/max
dB typ
mA/channel max
mA/channel max
mA max
µA max
µA max
mW max
Test Conditions/Comments
Sinking 200 µA
Sourcing 200 µA
SDO only
SDO only
ISINK = 3 mA
ISINK = 6 mA
Outputs unloaded, Boost off. 0.25 mA/channel typ
Outputs unloaded, Boost on. 0.325 mA/channel typ
VIH = DVDD, VIL = DGND
Outputs unloaded, Boost off, AVDD = DVDD = 3 V
1 AD5381-3 is calibrated using an external 1.25 V reference. Temperature range is –40°C to +85°C.
2 Accuracy guaranteed from VOUT = 10 mV to AVDD – 50 mV.
3 Guaranteed by characterization, not production tested.
4 Default on the AD5381-3 is 1.25 V. Programmable to 2.5 V via cr10 in the AD5381 control register; operating the AD5381-3 with a 2.5 V reference will lead to degraded
accuracy specifications and limited input code range.
AC CHARACTERISTICS1
Table 5. AVDD = 4.5 V to 5.5 V; DVDD = 2.7 V to 5.5 V; AGND = DGND = 0 V
Parameter
All
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
1/4 scale to 3/4 scale change settling to ±1 LSB.
6
µs typ
8
µs max
Slew Rate2
2
V/µs typ
Boost mode off, CR9 = 0
3
V/µs typ
Boost mode on, CR9 = 1
Digital-to-Analog Glitch Energy
12
nV-s typ
Glitch Impulse Peak Amplitude
15
mV typ
Channel-to-Channel Isolation
100
dB typ
See Terminology section
DAC-to-DAC Crosstalk
1
nV-s typ
See Terminology section
Digital Crosstalk
0.8
nV-s typ
Digital Feedthrough
0.1
nV-s typ
Effect of input bus activity on DAC output under test
Output Noise 0.1 Hz to 10 Hz
15
µV p-p typ
External reference, midscale loaded to DAC
40
µV p-p typ
Internal reference, midscale loaded to DAC
Output Noise Spectral Density
@ 1 kHz
150
nV/√Hz typ
@ 10 kHz
100
nV/√Hz typ
1 Guaranteed by design and characterization, not production tested.
2 Slew rate can be programmed via the current boost control bit in the AD5381 control register.
Rev. A | Page 7 of 36