AD5371 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD5371 Datasheet PDF : 28 Pages
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AD5371
Parameter
LVDS INTERFACE (REDUCED RANGE LINK)
Digital Inputs2
Input Voltage Range
Input Differential Threshold
External Termination Resistance
Differential Input Voltage
POWER REQUIREMENTS
DVCC
VDD
VSS
Power Supply Sensitivity2
∆Full Scale/∆VDD
∆Full Scale/∆VSS
∆Full Scale/∆DVCC
DICC
Min
875
–0.1
80
100
2.5
9
−16.5
Typ1 Max
1575
+0.1
100 132
5.5
16.5
−4.5
−75
−75
−90
2
IDD
ISS
Power Dissipation Unloaded (P)
Power-Down Mode
DICC
IDD
ISS
Junction Temperature3
18
20
−18
−20
280
5
35
−35
130
1 Typical specifications are at 25°C.
2 Guaranteed by design and characterization; not production tested.
3 θJA represents the package thermal impedance.
Unit
Test Conditions/Comments1
mV
V
Ω
mV
V
V
V
dB
dB
dB
mA
DVCC = 5.5 V, VIH = DVCC, VIL = GND; normal
operating conditions
mA
Outputs unloaded, DAC outputs = 0 V
mA
Outputs unloaded, DAC outputs = full scale
mA
Outputs unloaded, DAC outputs = 0 V
mA
Outputs unloaded, DAC outputs = full scale
mW
VSS = −8 V, VDD = 9.5 V, DVCC = 2.5 V
Control register power-down bit set
μA
μA
μA
°C
TJ = TA + PTOTAL × θJA
AC CHARACTERISTICS
DVCC = 2.5 V; VDD = 15 V; VSS = −15 V; VREF = 3 V; AGND = DGND = SIGGNDx = 0 V; CL = 200 pF; RL = 10 kΩ; gain (M), offset (C),
and DAC offset registers at default values; all specifications TMIN to TMAX, unless otherwise noted.
Table 3. AC Characteristics1
Parameter
DYNAMIC PERFORMANCE
Output Voltage Settling Time
Slew Rate
Digital-to-Analog Glitch Energy
Glitch Impulse Peak Amplitude
Channel-to-Channel Isolation
DAC-to-DAC Crosstalk
Digital Crosstalk
Digital Feedthrough
Output Noise Spectral Density @ 10 kHz
Min Typ Max Unit Test Conditions/Comments
20
30
1
5
10
100
20
0.2
0.02
250
μs
μs
V/μs
nV-s
mV
dB
nV-s
nV-s
nV-s
nV/√Hz
Settling to 1 LSB from a full-scale change
DAC latch contents alternately loaded with all 0s and all 1s
VREF0, VREF1, VREF2 = 2 V p-p, 1 kHz
Effect of input bus activity on DAC output under test
VREF = 0 V
1 Guaranteed by design and characterization; not production tested.
Rev. B | Page 5 of 28
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