AD5724R Ver la hoja de datos (PDF) - Analog Devices

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Fabricante

AD5724R

Complete, Quad, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs

Analog Devices 

Data Sheet

AD5724R/AD5734R/AD5754R

Parameter

DIGITAL INPUTS3

Input High Voltage, VIH

Input Low Voltage, VIL

Input Current

Pin Capacitance

DIGITAL OUTPUTS (SDO)3

Output Low Voltage, VOL

Output High Voltage, VOH

Output Low Voltage, VOL

Output High Voltage, VOH

High Impedance Leakage Current

High Impedance Output

Capacitance

POWER REQUIREMENTS

AVDD

AVSS

DVCC

Power Supply Sensitivity3

∆VOUT/∆ΑVDD

AIDD

AISS

DICC

Power Dissipation

Power-Down Currents

AIDD

AISS

DICC

Min

Typ Max Unit

2

V

0.8

V

±1

µA

5

pF

DVCC − 1

DVCC − 0.5

5

0.4

V

V

0.4

V

V

±1

µA

pF

4.5

16.5

V

−4.5

−16.5 V

2.7

5.5

V

−65

2.5

1.75

2.2

0.5

3

310

115

dB

mA/channel

mA/channel

mA/channel

µA

mW

mW

40

µA

40

µA

300

nA

Test Conditions/Comments

DVCC = 2.7 V to 5.5 V, JEDEC compliant

Per pin

Per pin

DVCC = 5 V ± 10%, sinking 200 µA

DVCC = 5 V ± 10%, sourcing 200 µA

DVCC = 2.7 V to 3.6 V, sinking 200 µA

DVCC = 2.7 V to 3.6 V, sourcing 200 µA

200 mV sine wave superimposed on AVSS/AVDD at

50 Hz/60 Hz

Outputs unloaded

AVSS = 0 V, outputs unloaded

Outputs unloaded

VIH = DVCC, VIL = GND, 0.5 µA typical

±16.5 V operation, outputs unloaded

+16.5 V operation, outputs unloaded

All DAC channels and internal reference

powered-down

1 For specified performance, headroom requirement is 0.9 V.

2 INL is the relative accuracy. It is measured from Code 512, Code 128, and Code 32 for the AD5754R, AD5734R, and AD5724R respectively.

3 Guaranteed by characterization; not production tested.

4 The on-chip reference is production trimmed and tested at 25°C and 85°C. It is characterized from −40°C to +85°C.

Rev. G | Page 5 of 33

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