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BU-61582 Ver la hoja de datos (PDF) - Unspecified

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BU-61582 Datasheet PDF : 48 Pages
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Configuration Registers #3, #4, and #5:
Used to enable many of the BU-61582’s advanced features.
These include all the enhanced mode features; that is, all the
functionality beyond that of the previous generation product, the
BUS-61559 Advanced Integrated Mux Hybrid with Enhanced RT
Features (AIM-HY’er). For BC mode, the enhanced mode fea-
tures include the expanded BC Control Word and BC Block
Status Word, additional Stop-On-Error and Stop-On-Status Set
functions, frame auto-repeat, programmable intermessage gap
times, automatic retries, expanded Status Word Masking, and
the capability to generate interrupts following the completion of
any selected message. For RT mode, the enhanced mode fea-
tures include the expanded RT Block Status Word, the combined
RT/Selective Message Monitor mode, internal wrapping of the
RTFAIL output signal (from the J-Rad chip) to the RTFLAG RT
Status Word bit, the double buffering scheme for individual
receive (broadcast) subaddresses, and the alternate (fully soft-
ware programmable) RT Status Word. For MT mode, use of the
enhanced mode enables use of the Selective Message Monitor,
the combined RT/Selective Monitor modes, and the monitor trig-
gering capability.
Data Stack Address Register:
Used to point to the current address location in shared RAM
used for storing message words (second Command Words, Data
Words, RT Status Words) in the Selective Word Monitor mode.
Frame Time Remaining Register:
Provides a read only indication of the time remaining in the cur-
rent BC frame. The resolution of this register is 100, 128 or 255
µs/LSB.
Message Time Remaining Register:
Provides a read only indication of the time remaining before the
start of the next message in a BC frame. The resolution of this
register is 1 µs/LSB.
BC Frame/RT Last Command/MT Trigger Word
Register:
In BC mode, it programs the BC frame time, for use in the frame
auto-repeat mode. The resolution of this register is 100 µs/LSB,
TABLE 5. INTERRUPT MASK REGISTER
(READ/WRITE 00H)
BIT
DESCRIPTION
15(MSB) RESERVED
14 RAM PARITY ERROR
13 BC/RT TRANSMITTER TIMEOUT
12 BC/RT COMMAND STACK ROLLOVER
11 MT COMMAND STACK ROLLOVER
10 MT DATA STACK ROLLOVER
9 HS FAIL
8 BC RETRY
7 RT ADDRESS PARITY ERROR
6 TIME TAG ROLLOVER
5 RT CIRCULAR BUFFER ROLLOVER
4 BC/RT SELECTED MESSAGE
3 BC END OF FRAME
2 FORMAT ERROR
1 BC STATUS SET/RT MODE CODE/MT PATTERN TRIGGER
0(LSB) END OF MESSAGE
with a range of 6.55 seconds; in RT mode, this register stores the
current (or most previous) 1553 Command Word processed by
the SP’ACE RT; in the Word Monitor mode, this register specifies
a 16-bit Trigger (Command) Word. The Trigger Word may be
used to start or stop the monitor, or to generate interrupts.
Status Word Register and BIT Word Registers:
Provide read-only indications of the BU-61582’s RT Status and
BIT Words.
Test Mode Registers 0-7:
These registers may be used to facilitate production or mainte-
nance testing of the SP’ACE and systems incorporating the
SP’ACE hybrid.
Data Device Corporation
www.ddc-web.com
8
BU-61582
M-08/04-0

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