R5H30211
AC Characteristics
Table 5 AC Characteristics
Conditions: VCC = 1.8 to 3.6 V, VSS = 0 V, Ta = –20 to +75°C, unless otherwise specified.
Item
Symbol Test Conditions Min.
Typ.
Max.
Unit
Clock cycle time (external clock)
tcyc
System clock (φ) cycle time
tscyc
(Internal clock, CPUCS = 0)
Figure 4.1
Figure 4.2
See table 7
278
333
417
ns
System clock (φ) cycle time
(Internal clock, CPUCS = 1)
tscyc
Figure 4.2
139
166
208
ns
System clock (φ) cycle time
(External clock)
tscyc
Figure 4.3
100
—
2000
ns
Clock high-level width
Clock low-level width
Clock fall time
Clock rise time
I/O port input fall time
I/O port input rise time
RES pulse width Cold reset
Warm reset
Power supply ON time
Power supply OFF time
EEPROM write time
tCH
tCL
tCf
tCr
tf
tr
tRWL1
tRWL2
tON
tOFF
tEPW
Figure 4.1
Figure 4.1
Figure 4.1
Figure 4.1
Figure 5
Figure 5
Figure 6
Figure 6
Figure 6
Figure 6
Rewrite
Erase
0.4
—
0.4
—
—
—
—
—
—
—
—
—
500
—
400
—
0
—
0
—
—
—
—
—
0.6
tcyc
0.6
tcyc
0.09*
tcyc
0.09*
tcyc
1.0
µs
1.0
µs
—
µs
—
tscyc
—
ms
—
ms
3
ms
1.5
ms
Clock hold time
Clock setup time
Interrupt pulse Sleep mode 2
width (IRQ)
Other modes
tCLKH
tCLKS
tIRQW
Figure 7
Figure 7
Figure 7
400
—
—
tcyc
20
—
—
tcyc
4
—
—
tscyc
400
—
—
ns
Notes: * Set CLK so as no noise is generated by the clock input and the frequency of the clock signal increases or
decreases monotonically.
REJ03B0259-0110 Rev.1.10 Jun. 05, 2009
Page 9 of 17