R5H30211 Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza

componentes Descripción

Fabricante

R5H30211

Renesas Microcomputer

Renesas Electronics 

R5H30211

Item

Security

Power-down states

Power-on reset circuit

On-chip oscillator

Power

Operating frequency

range

Operating temperature

Other function

Specification

• High frequency detector

• High voltage detector

• High temperature detector

• Low frequency detector

• Low voltage detector

• Low temperature detector

• Illegal access detector

• Illegal instruction detector

• EWE interrupt

• RNG failure detector

Sleep modes 1 and 2 (sleep mode is entered by the SLEEP instruction)

• On-chip

• Internal clock

• CPU: 6 MHz (± 20 %)

• Modular multiplication coprocessor: 12 MHz (± 20 %)

• Single-voltage power supply

1.8 V to 3.6 V

• When the internal clock for the CPU is generated by dividing the external clock by 2

(CPUCS1, CPUCS0 = 00): fCLK = 1 MHz to 8 MHz

• When the external clock is directly supplied as the internal clock for the CPU (CPUCS1,

CPUCS0 = 01): fCLK = 1 MHz to 8 MHz

• When the internal clock for the CPU is generated by multiplying the external clock by 1 by

on-chip PLL (CPUCS1, CPUCS0 = 10): fCLK = 1 MHz to 8 MHz

• When the internal clock for the CPU is generated by multiplying the external clock by 2 by

on-chip PLL (CPUCS1, CPUCS0 = 11): fCLK = 1 MHz to 5 MHz

Operating frequency of the modular multiplication coprocessor is as follows:

• When 4× speed calculation (PS1, PS0 = 10): fCOPRO = 20 MHz at maximum

• When 2× speed calculation (PS1, PS0 = 01): fCOPRO = 16 MHz at maximum

• When 1× speed calculation (PS1, PS0 = 00): fCOPRO = 8 MHz at maximum (fCLK: externally

input clock frequency; fCOPRO: operating frequency of the modular multiplication

coprocessor)

• –20 to +75°C

• Cold/Warm reset judgment function

• System clock multiplying function by PLL circuit

REJ03B0259-0110 Rev.1.10 Jun. 05, 2009

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