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74AHC273 Datasheet PDF : 18 Pages
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NXP Semiconductors
74AHC273; 74AHCT273
Octal D-type flip-flop with reset; positive-edge trigger
Table 2.
Symbol
D6
D7
Q7
VCC
Pin description …continued
Pin
Description
17
data input
18
data input
19
flip-flop output
20
supply voltage
6. Functional description
Table 3. Function table[1]
Operating mode
Reset (clear)
Load ‘1’
Load ‘0’
Control
MR
CP
L
X
H
↑
H
↑
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
↑ = LOW-to-HIGH;
X = don’t care.
7. Limiting values
Input
Dn
X
h
l
Output
Qn
L
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
VI
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < −0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5 V to (VCC + 0.5 V)
Tamb = −40 °C to +125 °C
−0.5
−0.5
[1] −20
[1] −20
−25
-
−75
−65
[2] -
+7.0
V
+7.0
V
-
mA
+20
mA
+25
mA
+75
mA
-
mA
+150
°C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN20 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
74AHC_AHCT273_3
Product data sheet
Rev. 03 — 13 May 2008
© NXP B.V. 2008. All rights reserved.
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