NCP1013 Ver la hoja de datos (PDF) - ON Semiconductor
Número de pieza
componentes Descripción
Fabricante
NCP1013 Datasheet PDF : 24 Pages
| |||
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
Tsw
Tstart
1 V Ripple
TLatch
Latch−off
Level
Figure 16. NCP101X Facing a Fault Condition (Vin = 150 Vdc)
The rising slope from the latch−off level up to 8.5 V
is
expressed
by:
Tstart
+
DV1 ·
IC1
C
.
The
time
during
which
the
IC
actually
pulses
is
given
by
tsw
+
DV2 · C
ICC1
.
Finally, the latch−off time can be derived
using
the
same
formula
topology:
TLatch
+
DV3 · C
ICC2
.
From these three definitions, the burst duty−cycle
can
be
computed:
dc
+
Tsw
Tstart ) Tsw ) TLatch
(eq. 2)
.
ǒ Ǔ dc +
DV2
ICC1 ·
DV2
ICC1
)
DV1
IC1
)
DV3
ICC2
(eq. 3) .
Feeding
the
equation with values extracted from the parameter section
gives a typical duty−cycle of 13%, precluding any lethal
thermal runaway while in a fault condition.
DSS Internal Dissipation
The Dynamic Self−Supplied pulls energy out from the
drain pin. In Flyback−based converters, this drain level can
easily go above 600 V peak and thus increase the stress on the
DSS startup source. However, the drain voltage evolves with
time and its period is small compared to that of the DSS. As
a result, the averaged dissipation, excluding capacitive losses,
can be derived by: PDSS + ICC1 · t Vds(t) u . (eq. 4) .
Figure 17 portrays a typical drain−ground waveshape where
leakage effects have been removed.
Vds(t)
Vr
Vin
toff
dt
ton
t
Tsw
Figure 17. A typical drain−ground waveshape
where leakage effects are not accounted for.
By looking at Figure 17, the average result can easily be
derived by additive square area calculation:
t
Vds(t) u+ Vin ·
(1 * d) ) Vr
·
toff
Tsw
By developing Equation 5, we obtain:
(eq. 5)
t
Vds(t)
u+ Vin * Vin
·
ton
Tsw
)
Vr
·
toff
Tsw
(eq. 6)
toff
can
be
expressed
by:
toff
+
Ip
·
Lp
Vr
(eq. 7)
where ton
can
be
evaluated
by:
ton
+
Ip
·
Lp
Vin
(eq. 8)
.
http://onsemi.com
11
Share Link: 