MN6732741 Ver la hoja de datos (PDF) - Panasonic Corporation

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Fabricante

MN6732741

Signal-processing IC for surveillance cameras and cameras for PC input

Panasonic Corporation 

MN6732741

I Function Descriptions (by circuit block) (continued)

4. ALC

The ALC block controls the exposure electronically by inputting the luminance signal, taking an averaged but

center weighted exposure reading over the whole image, and comparing that to the target value. That result is used

to control the CCD's electronic shutter.

In ELC mode, since the step size of the electronic shutter accumulation time is discrete, the AGC system is used

in conjunction with the ALC function to create a smoothly operating control system. This block also performs a 3-

field averaging flicker correction operation as well.

5. Luminance system

After generating the luminance signal from the complementary color filter CCD output using a low-pass filter,

this block generates the horizontal and vertical aperture signals and performs coring/low-luminance suppression,

gamma correction, and blanking processing.

This block includes a defect correction circuit that corrects for defective pixels in the CCD. One of two outline

correction levels can be selected with the APGAIN pin.

The IC also includes a defect correction circuit that corrects for missing pixels in the CCD. The gamma correction

is continuously variable from γ = 0.3 to 1. The luminance signal low-pass filter can be bypassed to allow this device

to handle black-and-white CCDs.

6. Chrominance system

This block performs white balance processing, carrier balance, color temperature correction, and low-luminance/

high-luminance chrominance suppression processing.

7. AWB

This block generates the auto white balance control signal. This white balance function operates so that the state

of the immediately prior and proper illumination level will be held in case of low illumination levels.

8. ENC

This block converts between NTSC and PAL. A digital technique in which 4fSC is created from FSC is adopted,

and the clock system is unified into a single system. To create the composite video signal, clock rate conversion is

also applied to the Y signal and the signals are mixed digitally. The sync signal can also be mixed digitally.

9. RGBCNV

The YUV signal generated from the luminance and chrominance signals is converted to RGB using a matrix.

However, since the band of the UV signal is dropped to around 800 kHz at a relatively early stage relative to the

chrominance signal, this is not a signal in which all three channels have the same wide band as the Y signal, such as

the signals used in 3-CCD video cameras.

10. YCMPX

This block takes the FCK rate luminance and UV signals and outputs them as an 8-bit time-division multiplexed

signal with a 2FCK rate.

In BT656 standard mode, SAV and EAV are embedded in the signal.

11. D/A converters

One D/A converter block converts the digital input to analog output. There are three channels, and one channel

with a 10-bit resolution is provided for each of the composite, Y, and G signals. The circuit is designed so that the

sync can be mixed digitally.

The remaining D/A converter is a two-channel 8-bit device used for the chrominance, R, and B signals.

12. PWM

Provides an independently controllable 4-channel PWM output circuit that can be used to control analog circuits

peripheral to the IC. These outputs can be used, for example, for VREF adjustment of D/A converter.

13. CG

This circuit generates the high-speed pulse signals (H1, H2, DS1, and DS2) used by the CCD.

This block's logic system power supply is isolated from the other IC internal logic circuits to minimize noise.

SDB00060AEM

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