MN6732741 Ver la hoja de datos (PDF) - Panasonic Corporation

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componentes Descripción

Fabricante

MN6732741

Signal-processing IC for surveillance cameras and cameras for PC input

Panasonic Corporation 

MN6732741

I Block Diagram

YUVOE

VIN

Horizontal

drive pulse

output

Vertical system

drive Sync system

pulse output

FCK

2FCK

10-bit

A/D

AGC

Y

Luminance

processing

C

Chrominance

processing

Y/C

MPX

ENC

10-bit

D/A

WB gain

RGB

CNV

CG

Carrier signal

YLPF

Digital AGC

control

SSG

ALC

ATN

SUB control

FCK

2FCK

2

BLK

CSYNC

8-bit

D/A

Register R/W for each block

DATA

WE RE

I2C-bus control

PWM

PWM

PWM

PWM

YUVOE

YUV0

to YUV7

Y

COMP output

G

(2-ch)

R

C output, B

SCL

SDA

PWM0

PWM1

PWM2

PWM3

I Function Descriptions (by circuit block)

1. ADC

Converts the post-CDS CCD signal to a 10-bit digital signal.

2. PATGEN

Generates test pattern signals. This circuit generates horizontal and vertical patterns with a color bar (3 colors)

format. Since it simulates the output of the CCD 4-color complementary color filters, it conveniently allows prob-

lems in the analog block, from the CCD to the A/D converter, and IC internal problems, to be isolated. It can also be

used to temporarily halt CCD image output and generate a blue background signal.

3. AGC (AGC, pixel mixing, mirror reversal, and OB clamping functions)

Performs AGC control (up to +24 dB) digitally by linking with the ALC. Since the IC also provides an interface

output to an external analog AGC (NN2038 or NN2039), over 24 dB of gain can be provided.

When a VGA CCD is used, since progressive scan is used, the photodiode mixing operation used with earlier

interlaced CCDs is not required. The AGC circuit includes an internal pixel mixing circuit, and is designed for both

progressive and interlaced scan at the circuit level.

In the mirror mode provided by 510 H and 768 H CCDs, it is possible to generate a reversed video signal by

controlling RAM. OB correction is also performed in this block, and this function has both a digital mode, in which

processing is performed internally to the IC, and an analog mode that controls the external CDS and AGC IC clamp

voltage.

2

SDB00060AEM

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