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MB89202

8-bit Proprietary Microcontroller F2MC-8L MB89202 Series

Fujitsu 

MB89202 Series

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• MB89F202 : Flash (at least 10,000 program / erase cycles) with read protection

• Low-power consumption modes ( sleep mode, and stop mode)

• SH-DIP-32, SSOP-34 package

• CMOS Technology

■ PRODUCT LINEUP

Part number

Parameter

Classification

MB89202

Mask ROM product

MB89F202

Flash memory product

(read protection)

MB89V201

Evaluation product

(for development)

ROM size

RAM size

16 K × 8 bits

(internal mask ROM)

16 K × 8 bits

(internal flash)

512 × 8 bits

32K x 8 bits

(external EPROM)

CPU functions

Number of instructions : 136

Instruction bit length :

8 bits

Instruction length :

1 to 3 bytes

Data bit length :

1, 8, 16 bits

Minimum execution time : 0.32 µs to 5.1 µs (12.5 MHz)

Interrupt processing time : 2.88 µs to 46.1 µs (12.5 MHz)

Ports

General-purpose I/O ports (CMOS) : 26 (also serve as peripherals )

(4 ports are also an N-ch open-drain type.)

21-bit time-base

timer

21-bit Interrupt cycle : 0.66 ms, 2.64 ms, 21 ms, or 335.5 ms with 12.5 MHz main clock

Watchdog timer

Reset generation cycle : 335.5 ms minimum with 12.5 MHz main clock

8-bit PWM timer

8/16-bit capture,

timer/counter

8-bit interval timer operation (square output capable, operating clock cycle :

0.32 µs , 2.56 µs, 5.1 µs, 20.5 µs)

8-bit resolution PWM operation (conversion cycle : 81.9 µs to 21.47 s : in the selection of

internal shift clock of 8/16-bit capture timer)

Count clock selectable between 8-bit and 16-bit timer/counter outputs

8-bit capture timer/counter × 1 channel + 8-bit timer or

16-bit capture timer/counter × 1 channel

Capable of event count operation and square wave output using external clock input with

8-bit timer 0 or 16-bit counter

UART

Transfer data length : 6/7/8 bits

8-bit Serial I/O

8 bits LSB first/MSB first selectable

One clock selectable from four operation clocks

(one external shift clock, three internal shift clocks : 0.8 µs, 6.4 µs, 25.6 µs)

12-bit PPG timer

Output frequency : Pulse width and cycle selectable

External interrupt 1

(wake-up function)

3 channels (Interrupt vector, request flag, request output enabled)

Edge selectable (Rising edge, falling edge, or both edges)

Also available for resetting stop/sleep mode (Edge detectable even in stop mode)

External interrupt 2

(wake-up function)

1 channel with 8 inputs (Independent L-level interrupt and input enable)

Also available for resetting stop/sleep mode (Level detectable even in stop mode)

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2

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